Semiconductor device employing tunnel effect and method of fabricating the same

Tunneleffekt-Halbleiteranordnung und Verfahren zur Herstellung

Dispositif semi-conducteur à effet tunnel et méthode de fabrication


A buffer layer (2), a barrier layer (3), a channel layer (4) and another barrier layer (5) are successively formed on a semiinsulating semiconductor substrate (1). The forbidden bandwidths of the barrier layers (3,5) holding the channel layer (4) therebetween are larger than that of the channel layer (4). The channel layer (4) is of a p + -type doped in high concentration, and a gate electrode opposed part (6) in the channel layer is of an n + -type doped in high concentration. The gate electrode opposed part (6) in the channel layer is formed by Si diffusion/doping from an SiO x /SiN multilayer film.




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Patent Citations (8)

    Publication numberPublication dateAssigneeTitle
    EP-0256360-A2February 24, 1988Hitachi, Ltd.Gated tunnel diode
    EP-0488677-A2June 03, 1992Kawasaki Steel CorporationSemiconductor device of band-to-band tunneling type
    EP-0549373-A1June 30, 1993Nec CorporationTunneltransistor und dessen Herstellungsverfahren
    JP-H05175494-AJuly 13, 1993Nec Corp, 日本電気株式会社Tunnel transistor
    JP-H08186273-AJuly 16, 1996Nec Corp, 日本電気株式会社トンネルトランジスタ
    US-5021841-AJune 04, 1991University Of IllinoisSemiconductor device with controlled negative differential resistance characteristic
    US-5410160-AApril 25, 1995Motorola, Inc.Interband tunneling field effect transistor
    US-5412224-AMay 02, 1995Motorola, Inc.Field effect transistor with non-linear transfer characteristic

NO-Patent Citations (1)

    PATENT ABSTRACTS OF JAPAN vol. 96, no. 11 29 November 1996 (1996-11-29)

Cited By (0)

    Publication numberPublication dateAssigneeTitle